Design an Oscillator Using a Common Collector Bipolar Transistor
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BJT common collector Colpitts oscillator
- Thread starter Helena Wells
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In any case, whether we treat it as CE or CC, the working process of this circuit, the current and voltage of each part in the circuit will not change as a result.
Are you saying for the input that VL = VC1? I don't think can be correct.I believe that treating this oscillator circuit as a common emitter configuration is not completely unreasonable. At least for now, I can't think of a reason to absolutely deny it. Although I really don't know whether this view would violate basic theory or principle.![]()
In any case, whether we treat it as CE or CC, the working process of this circuit, the current and voltage of each part in the circuit will not change as a result.
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View attachment 277878
Are you saying for the input that VL = VC1? I don't think can be correct.
Of course, the voltage values of L and C1 in the circuit should be different. What I mean is that as long as the input and output are defined correctly as shown on the diagram I posted, then it seems that it is no problem to call it CE or CC.
This is just an expression of humor. Since the voltage and current of each component in the oscillator circuit will not change due to the different names we give to the oscillator circuit, it seems that we don't have to care too much about whether its name is CE or CC.
Of course, the voltage values of L and C1 in the circuit should be different. What I mean is that as long as the input and output are defined correctly as shown on the diagram I posted, then it seems that it is no problem to call it CE or CC.This is just an expression of humor. Since the voltage and current of each component in the oscillator circuit will not change due to the different names we give to the oscillator circuit, it seems that we don't have to care too much about whether its name is CE or CC.
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I think, we should not mix different things.
* The shown circuit is an oscillator with a BJT in CC configuration. No doubt about it.
* However, we can use the "virtual ground" method - and such a new view allows us to consider the BJT now in CE configuration (of course, no change for passive elements).
* However, during calculation of the loop gain (verification of the oscillation condition) it is of course important to know which gain formula we have to apply. Hence, it is important to know if the BJT is in CC or CE configuration.
I think, we should not mix different things.
* The shown circuit is an oscillator with a BJT in CC configuration. No doubt about it.
* However, we can use the "virtual ground" method - and such a new view allows us to consider the BJT now in CE configuration (of course, no change for passive elements).
* However, during calculation of the loop gain (verification of the oscillation condition) it is of course important to know which gain formula we have to apply. Hence, it is important to know if the BJT is in CC or CE configuration
If we define the collector of the transistor as ground, the base as the input, and the emitter as the output, and the circuit is designed correctly, then this must of course be a common collector configuration. I'm just saying I won't deny that other people use another way to deal with it.
Regarding the derivation of the oscillation conditions, the calculation methods of the CE configuration and the CC configuration can of course be different, and even the calculation methods based on the same configuration (CE or CC) can be different. However, whether we find the oscillation conditions based on CE or CC and use any different calculation methods, the basis should be the same, that is, the closed loop gain is equal to 1, and the results of oscillation conditions should also be the same, because they are actually dealing with the same oscillator circuit.
However, the OP defines the analysis approach as an amplifier with feedback, so it is reasonable to choose a canonical form that is easy to understand. Often (for good design documentation), the way the schematic is drawn will guide the analysis to follow the designer's understanding or intent. A good schematic is typically drawn so that the canonical forms or common structures are readily apparent.
I fail to see the broader point. This all seems like a pedantic diversion.
Just a small correction: It is the LOOP GAIN which must be "1"-However, whether we find the oscillation conditions based on CE or CC and use any different calculation methods, the basis should be the same, that is, the closed loop gain is equal to 1..
Just a small correction: It is the LOOP GAIN which must be "1"-
Yes, the correct name should be LOOP GAIN.
Closed loop gain and open loop gain are usually used to describe the transfer function of feedback amplifier or feedback control system.

By the way, it is sometimes not easy to find the mathematical equation of the oscillator loop gain, so I tried the simplest example below, but I think it is too difficult to derive manually for more complicated situation.
If you view the schematics in the reference provided by the OP, you will see why this implementation is called Common Collector.The transistor cannot be said to be in Common Collector.
http://fourier.eng.hmc.edu/e84/lectures/ch4/node12.html
The component values in the OP circuit are non-optimum in that the amplitude is regulated by crashing hard against the supply rails. That heavy clipping and harmonic distortion is caused by excessive loop gain. The resulting signals are not sinusoidal which makes analysis of the steady state difficult.
By reducing the tank transformer gain, C1=330 pF, C2=100 pF, the circuit can be tamed to the point where the signals are sinusoidal (harmonics more than 40 dB down), the oscillator starts reliably, and the BJT is never turned off completely at any point in the cycle. By using a high resistance base bias (Rth=45k), with a low value of C3 = 10 pF, the signal is attenuated slightly and the influence of transistor parameters on the tank resonator frequency is reduced. Raising the value of the emitter resistor reduces current consumption, and increases the Q of the tank circuit.
There is no inverter in this implementation. The emitter follower is non-inverting, as is the tank circuit transformer. Apart from the power supply, there are only three nodes in the circuit.
The simulation peak-peak amplitude of the sine waves at the three active nodes are as follows. V(tank)=7.64 Vpp; V(base)=6.08 Vpp; V(emit)= 5.92 Vpp. From that a voltage gain audit of the loop shows the gain is distributed as follows.
The tank to base gain; G = 6.08 / 7.64 = +0.796
The C3=10 pF coupling and base bias, Rth=45k, provides base signal current.
The base to emitter gain is; G = 5.92 / 6.08 = +0.974
Which is expected for an emitter follower.
The tank transformer gain is; G = 7.64 / 5.92 = +1.290
As a guide, I would expect; G = (1/C1+1/C2)*C1 = 1.303
The loop gain is the product of those three gain factors. Naturally the three Vpp amplitudes mutually cancel around the loop, to unity.
(6.08 / 7.64) * ( 5.92 / 6.08) * (7.64 / 5.92) = 1.000
- why do you think it's crashing real hard? The base voltage reaching 5V, the base current increases and discharges the C3 so as to decrease the average emitter current and to stop the oscillation amplitude increase. So the amplitude is just reasonably stabilized, if the transistor is fast even when approaching saturation.... the amplitude is regulated by crashing hard against the supply rails.
For amplitude stability, a diode can be added like this:
- as the oscillation grows, the collector current pulses are suppressed more and more, until the amplitude is stable:
(the negative supply is added simply to improve the simulation start, so the capacitors need not to be charged much before the oscillation begins)
You do have excessive loop gain, which is evident by the distortion of the sinusoidal tank voltages. Try changing the capacitor ratio, to reduce the gain of the tank, which lowers the harmonic content. That should calm things down a bit.- yes, now I see, saturation ought to be avoided.
It seems to me that a negative supply is an expensive way to start a simulation. It should be possible to specify an initial condition, such as 1 mA circulating in the tank, by using the equivalent of a command such as .IC I(L1)=1mA.
Also, the 5mH emitter inductor is very expensive in PCB space and in $. Can you design that out? Maybe increase the emitter resistor value.
Looking at the diode, I see it conducts in the same direction as the base. Can the diode be reversed so as to limit on the other half of the cycle, again reducing harmonics?
- that's all quite correct of course! I just tried to show how the diode was moderating the oscillation.You do have excessive loop gain, which is evident by the distortion of the sinusoidal tank voltages. Try changing the capacitor ratio, to reduce the gain of the tank, which lowers the harmonic content. That should calm things down a bit.It seems to me that a negative supply is an expensive way to start a simulation. It should be possible to specify an initial condition, such as 1 mA circulating in the tank, by using the equivalent of a command such as .IC I(L1)=1mA.
Also, the 5mH emitter inductor is very expensive in PCB space and in $. Can you design that out? Maybe increase the emitter resistor value.
The diode is a sort of peak detector - not just a nonlinear loss resistor.
Of course the final circuit must be like this:
- but now it takes more than 1000 cycles to come to something like stationary process.
As for the diode, it's working correct - without it, the transistor current is pretty ugly formed again.
The diode current pulses are about 1mA, way more than the base (20 microAmpere or so).
Another interesting method is to place a variable resistor in parallel with the tuned circuit. Whilst this might be thought to lower the Q and hence destroy the stability, the negative resistance of the circuit cancels the resistance down to some threshold value, when oscillation will gently stop.
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Design an Oscillator Using a Common Collector Bipolar Transistor
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